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The DSpace digital repository system captures, stores, indexes, preserves, and distributes digital research material.Fri, 19 Apr 2024 17:00:53 GMT2024-04-19T17:00:53ZFPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter
http://hdl.handle.net/10985/6749
FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter
SANDULESCU, Paul; IDKHAJINE, Lahoucine; CENSE, Sébastien; COLAS, Frédéric; BRUYERE, Antoine; SEMAIL, Eric; KESTELYN, Xavier
A general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special family of vectors, different of this one used in Pulse Width Modulation (PWM) intersective strategy and in common Space Vector PWM (SVPWM). To preserve the parallelism of the algorithm and fulfill the execution time constraints, the implementation is made on a Field Programmable Gate Array (FPGA). Comparisons with more classical 2-level and 3-level PWM are provided.
Sat, 01 Jan 2011 00:00:00 GMThttp://hdl.handle.net/10985/67492011-01-01T00:00:00ZSANDULESCU, PaulIDKHAJINE, LahoucineCENSE, SébastienCOLAS, FrédéricBRUYERE, AntoineSEMAIL, EricKESTELYN, XavierA general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special family of vectors, different of this one used in Pulse Width Modulation (PWM) intersective strategy and in common Space Vector PWM (SVPWM). To preserve the parallelism of the algorithm and fulfill the execution time constraints, the implementation is made on a Field Programmable Gate Array (FPGA). Comparisons with more classical 2-level and 3-level PWM are provided.